M750 User-Memory Inlay
Impinj M750 UHF Inlay
32-bit User Memory
Quick answer
Impinj M750 is the Monza R6-P silicon — the user-memory tier of the M700 family. Compared to the M730 (96-bit EPC only), M750 adds 32 bits of user memory and password-memory support, plus the short-range mode that lets a reader attenuate read distance at point-of-sale for retail-privacy workflows. Read sensitivity −22.1 dBm, write −17.3 dBm, full ISO/IEC 18000-63 / EPC Gen2v2 base command set. Proud Tek supplies M750 inlays for supply-chain programmes that write small on-tag payloads (lot codes, GS1 AI fragments, RTI cycle counters, simple offline traceability), retail rollouts that need post-sale read-range attenuation, and applications that need access / kill password protection on top of the M700-family economics. Per-tap cryptographic chip-authentication is NOT a shipping feature on Monza R6-P or any Impinj M700 / M800 chip today — programmes that genuinely need it specify HF chips (NXP NTAG 424 DNA / UCODE DNA) alongside, not instead of, a UHF inventory tag.
- 32-bit user memory + password memory on top of the M700-family base — small on-tag payloads (lot codes, GS1 AI fragments, RTI cycle counters, partial serials) without a cloud round-trip during read. M730's 0-bit user memory steps up to M750's 32 bits at ~30% silicon ASP premium; mid-tier choice in the M700 family.
- Short-range mode for point-of-sale retail privacy — reader can attenuate the chip's read sensitivity on command, making the tag hard to read outside the store without permanently killing it. Physical-layer attenuation, NOT cryptographic chip-authentication (M750 doesn't implement AUTHENTICATE / AES-128).
- Pin- and protocol-compatible with the rest of the M700 family — same antenna designs, same Gen2v2 reader fleet, same converter tooling. M750 inlays drop into existing M730 production lines by swapping the chip-on-foil; no antenna re-tune required.
Used in these industries
Deployments where this product is referenced on our industry landing pages.
At a glance
Use these short answers to decide whether this page matches the project before moving into the detail.
Chip silicon and lineage
Impinj M750 = Impinj's rebrand of Monza R6-P silicon under the M700-family naming refresh (2022). Datasheet, EPC Gen2v2 feature support, and TID prefix unchanged from th...
Memory architecture
EPC bank: factory default 128 bits — reconfigurable to 96-bit EPC + 64-bit user memory; or 96-bit EPC + 32-bit user memory (the common balanced configuration). TID bank:...
Next step
Ready to move forward? Start your inquiry to get specific answers for this project.
Request M750 inlay quote and samples- Sensitivity and read range
-
- Read sensitivity: −22.1 dBm typical (Impinj datasheet) — within ~0.4 dB of M730 (−22.6 dBm); choose by memory needs, not range.
- Write sensitivity: −17.3 dBm typical.
- Free-air bench: 7-9 m on paper hangtag with Impinj R700 at +30 dBm EIRP. Real-world: 5-7 m apparel hangtag, 2-3 m on-metal with foam spacer, 1.5-2 m on-liquid.
- Maximum range alternatives if M750's sensitivity isn't enough: M800 series (M830 / M850, ~1-2 dB better) or NXP UCODE 9 (−23.0 dBm). User-memory-first programmes that don't need the sensitivity step-up can stay on M750.
- Privacy: short-range mode (not crypto)
-
- Monza R6-P supports a short-range mode where the chip reduces its read sensitivity on command — useful at point-of-sale to limit which readers can interrogate the tag once it leaves the store, without permanently bricking the tag.
- Short-range mode is a physical-layer attenuation feature, NOT cryptographic. It reduces detection range; it does not prove chip authenticity, sign messages, or implement AES-128.
- For GDPR-aware EU retail rollouts that need a stronger privacy guarantee at POS (truly unreadable rather than short-range), the EPC Gen2v2 base set also exposes a Kill command — destructive, one-way.
- Per-tap cryptographic authentication is not a Monza R6-P / M750 feature.
- Data integrity features
-
- MarginRead command — reads the EPC with a configurable margin against background noise; surfaces tags that read but are at the edge of reliability so converters can flag them before they ship.
- Memory self-check — chip validates memory contents during the read; integrity errors are reported back to the reader rather than returning corrupted EPC.
- TID parity check — reduces false-positive reads on damaged or weak tags.
- 32-bit access password gates write operations to EPC / user memory after a programme is sealed.
- Air interface and standards
-
- ISO/IEC 18000-63 / EPC UHF Gen2v2 air interface. Backward-compatible with the entire installed reader base.
- GS1 EPC Tag Data Standard (TDS) 2.x SGTIN encoding for retail item-level; SSCC / GIAI / GRAI / GLN for non-retail.
- RAIN RFID Alliance certified; Walmart RFID source-tag mandate compatible (M750 satisfies the SGTIN-96 source-tag requirement at the same EPC bank as M730).
- FCC Part 15.247 (US, 902-928 MHz) and ETSI EN 302 208 (EU, 865-868 MHz) reader-side regulatory operation.
- Where M750 earns its premium over M730
-
- Supply-chain programmes that write small on-tag data — GS1 AI fragments (lot, batch, expiry offset), partial serial extensions, or short audit tokens — to avoid a cloud round-trip during receiving / cycle-counting.
- Returnable transit items (RTIs) where each cycle increments a counter on the tag; the cycle counter is on-tag rather than cloud-keyed.
- Retail / consumer-electronics programmes that want a short-range mode at point-of-sale so the tag is hard to read from outside the store without permanently killing it.
- Applications needing the 32-bit access password to gate write operations after the inlay is sealed.
- Where M750 is NOT the right fit
-
- Pure SGTIN-96 retail volume tagging with no user-memory write: M750 silicon ASP is ~30% higher than M730. If the application doesn't use the 32-bit user memory or the short-range mode, M730 is the correct cost-optimised choice.
- Maximum sensitivity / longest read range: M800 series (M830 / M850) is ~1-2 dB better; NXP UCODE 9 (−23.0 dBm) also ahead.
- Larger on-tag payloads (full DPP URL on-tag, RTI trip logs, field-service records): step up to Alien Higgs-9 (688-bit user memory) or NXP UCODE 9 (32-224-bit configurable).
- Per-tap cryptographic chip authentication (luxury anti-counterfeit, pharmaceutical anti-substitution, bank-grade brand protection): NOT a Monza R6-P / M750 feature. The EPC Gen2v2 AUTHENTICATE command framework exists in the standard but is not implemented as a shipping feature on any mainstream RAIN RFID silicon (M700 / M800 / UCODE 9 / Higgs-9). For real per-tap crypto, specify NXP NTAG 424 DNA or UCODE DNA on a separate HF tag, typically alongside the UHF inventory tag rather than instead of.
- Procurement and lead times
-
- MOQ 10,000 pieces for stock antenna designs.
- Lead time 3-5 weeks for stock antenna — same converter tooling and encoders as M730.
- Custom antenna designs: MOQ 50,000-100,000 pieces; tooling 6-10 weeks + production 2-4 weeks.
- Sample sets of 100-500 pieces available for evaluation. Specify M730 vs M750 at the quote stage so the converter pulls the right chip-on-foil.
Why M750 — user memory at M700-family economics
- M730 (no user memory) → M750 (32-bit user memory) is the natural step inside the M700 family. Same antenna designs, same readers, same converter tooling — only the chip-on-foil changes.
- Supply-chain and RTI programmes get the small on-tag payload they need without the silicon ASP step up to Higgs-9 (688-bit user) or UCODE 9 (224-bit configurable).
- Short-range mode at POS is a useful privacy primitive for retail rollouts that don't want to kill the tag outright (legitimate returns / warranty workflows still need a readable EPC).
- Per-tap cryptographic features (AUTHENTICATE, Crypto Suite 3 AES-128, Untraceable as a shipping crypto feature) are NOT on Monza R6-P or any M700 chip; programmes that need them specify HF (NTAG 424 DNA / UCODE DNA) on a second tag, not UHF.
M750 vs M730 — variant selection inside the M700 family
M730 — cost-optimised retail volume
- 96-bit EPC, no user memory, no password memory
- Lowest silicon ASP in the M700 family
- Default for SGTIN-96 retail item-level tagging (Walmart / Inditex / Nike mandate volume)
- Cloud item-master holds everything beyond the SGTIN
- Same sensitivity floor (~−22.6 dBm) as M750 — choose for cost, not range
M750 — supply-chain + small on-tag data
- 96-bit EPC (or 128-bit configurable) + 32-bit user memory + access / kill password memory
- ~30% higher silicon ASP than M730 — earned only if user memory or password protection is actually used
- Supply-chain / logistics / RTI / mixed-application choice when small on-tag data avoids a cloud round-trip
- Short-range mode available for POS privacy attenuation
- Same antenna compatibility as M730 — chip swap is per-SKU, not per-antenna
From Monza R6-P launch 2017 to the M700-family naming refresh
- 2015
ISO/IEC 18000-63:2015 Amendment 1 publishes, adding the optional AUTHENTICATE command framework to EPC Gen2v2. The standard framework exists; mainstream RAIN RFID silicon (Monza R6 / R6-P, NXP UCODE 8 / 9, Alien Higgs-9) does not implement it as a shipping crypto feature — programmes that need per-tap cryptographic authentication today specify HF chips (NTAG 424 DNA / UCODE DNA).
- 2017
Impinj Monza R6-P silicon launches with the user-memory tier above the volume-retail Monza R6 — 32 bits of user memory plus access / kill password support, alongside Monza's MarginRead, memory self-check, and short-range mode.
- 2018
EPC Gen2v2 base command set is fully shipping across the RAIN RFID reader fleet; Walmart RFID source-tag mandate scales the M700-family ecosystem at billion-tag volume.
- 2022
Impinj rebrands Monza R6 / R6-P / R6-A silicon as M730 / M750 / M770 under the M700-family naming refresh. Datasheet feature support and TID prefix unchanged — existing inventory and ecosystem fully interoperable with the new naming.
- 2023
Impinj announces M800 series (M830, M850) as the next-gen successor to the M700 family. ~1-2 dB sensitivity gain, ~30% lower chip power, Gen2X protocol support. Pin- and protocol-compatible upgrade path for M730 / M750 / M770 antenna designs.
- 2026 Today
M730 remains the volume retail-floor cost optimum; M750 holds the supply-chain / RTI / small-payload niche where 32-bit user memory is actually used; M770 covers mixed-surface programmes with AutoTune. M800 (M830 / M850) runs as the next-gen migration path for any of the three when sensitivity / power gains are operationally significant.
Useful next pages
Use these linked product, guide and comparison pages to keep the next click specific and practical.
Related M700-family inlays
Compare M750 against the rest of the M700 family and the M800 next-gen.
Cross-vendor alternatives
Other UHF chips when M750's 32-bit user memory isn't enough or when crypto is actually required.
Chip-level technical reference
Deep-dive specifications and chip-family comparisons relevant to this SKU.
Industry applications
Industries where M750's 32-bit user memory + short-range mode are useful.
FAQ
Is Impinj M750 the same as Monza R6-P?
Yes — Impinj rebranded Monza R6-P silicon as M750 under the M700-series naming refresh (2022). Datasheets, EPC Gen2v2 feature support, sensitivity numbers, and TID prefix are unchanged. Existing readers, encoders, and inlays branded as Monza R6-P fully interoperate with M750 inlays.
How does M750 differ from M730?
M730 (96-bit EPC, no user memory, no password memory) is the cost-optimised retail volume chip — the Walmart / Inditex mandate default. M750 (96-bit EPC + 32-bit user memory + access / kill password) is the supply-chain / RTI / mixed-application chip — earns its ~30% silicon ASP premium when small on-tag data avoids a cloud round-trip during reading, when RTI cycle counters are written on-tag, or when password-gated writes matter. Same sensitivity floor (~−22.1 vs −22.6 dBm — choose by memory needs, not range). Same antenna designs — chip swap is per-SKU.
Does M750 support cryptographic AUTHENTICATE or AES-128?
No. The ISO/IEC 18000-63:2015 Amendment 1 AUTHENTICATE command framework exists as an optional standard, but Monza R6-P / M750 does NOT implement it as a shipping feature. This isn't a Monza R6-P-specific gap: per-tap cryptographic chip authentication is not a shipping feature on any mainstream UHF RAIN RFID chip today (Impinj M700 / M800, NXP UCODE 9, Alien Higgs-9). The 'AES-128 crypto AUTHENTICATE' framing that appears in some marketing material describes the standard, not silicon implementations. Programmes that genuinely need per-tap cryptographic authentication (luxury anti-counterfeit, pharmaceutical anti-substitution, banking-grade brand protection) specify HF chips such as NXP NTAG 424 DNA or UCODE DNA — typically deployed alongside, not instead of, a UHF inventory tag.
What is the short-range mode and is it the same as cryptographic privacy?
Short-range mode is Monza R6-P's physical-layer privacy primitive: the chip can be commanded to reduce its read sensitivity, making it hard for a reader outside the store / warehouse to interrogate the tag. It is a useful privacy mechanism for retail point-of-sale workflows because it doesn't permanently brick the tag (legitimate returns / warranty / re-issue workflows still work). It is NOT cryptographic — it doesn't prove chip identity, doesn't sign messages, doesn't use AES-128. For permanent neutralisation, the EPC Gen2v2 Kill command is available — destructive and one-way.
Can I use M750 with my existing M730 antenna designs and reader fleet?
Yes — pin- and protocol-compatible. M750 inlays use the same antenna designs as M730 / M770; production lines swap M730 chip-on-foil for M750 chip-on-foil without antenna re-tune, encoder revalidation, or reader-fleet re-qualification. Any EPC Gen2v2-compliant reader (Impinj R700-series, Zebra FX9600 / FX7500, Alien ALR-9900+) reads M750 EPC and writes M750 user memory at standard throughput.
When should I migrate M750 to M800?
M800 (M830 / M850) delivers ~1-2 dB better sensitivity, ~30% lower chip power, and Gen2X protocol features at a similar silicon ASP to M750. Migrate when sensitivity / power efficiency matter (small-antenna / on-metal / on-liquid programmes) or when Gen2X encoding throughput is operationally significant on high-speed printer-applicator lines. Stay on M750 when 32-bit user memory + short-range mode + the existing ecosystem are working and the sensitivity gain isn't operationally meaningful. The migration is pin- and protocol-compatible — same antenna designs.
Sources & references
Primary standards, OEM datasheets and regulatory documents cited by this article. All URLs were verified on the access date shown below.
- Impinj Monza R6 series — product page
Official product page for Monza R6 / R6-P (M730 / M750) — memory architecture, sensitivity, short-range mode, MarginRead, password memory.
- Impinj M730 / M750 / M770 — M700 series datasheet
M700-family chip-level data sheet — confirms M750 = Monza R6-P silicon with rebrand naming. Lists user-memory + password-memory + short-range mode features.
- Monza R6-P Product Brief / Datasheet (mirror)
Pre-rebrand Monza R6-P silicon datasheet — read sensitivity −22.1 dBm, write −17.3 dBm, 64-bit user memory budget, 32-bit access / kill passwords, short-range mode.
- GS1 EPC UHF Gen2v2 Air Interface Protocol
Air-interface protocol that Monza R6-P / M750 implements. The optional AUTHENTICATE / Crypto Suite 3 framework defined in Amendment 1 is NOT implemented in Monza R6-P / M750 silicon.
- ISO/IEC 18000-63:2015 Amendment 1 — Authentication mechanism
Defines the optional AUTHENTICATE command framework for EPC Gen2v2. The standard exists; mainstream RAIN RFID silicon (Monza R6-P / M750 included) does not implement it as a shipping feature.
- RAIN RFID Alliance
Industry consortium promoting UHF Gen2v2 interoperability; certification framework for M750 deployments.
Proud Tek is a Shenzhen-based RFID & NFC manufacturer supplying hotel chains, transit operators, event venues and retail brands worldwide. Every order includes free samples, RF testing and dedicated project support.
Get a Quick Quote
Tell us about your project and we'll respond within one business day. Fields marked (asterisk) are required.